Added new programs 2.7inch V2 e-Paper routine.
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34 changed files with 23147 additions and 1125 deletions
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Debug MCU Configuration
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// <o0.0> DBG_SLEEP
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// <i> Debug Sleep Mode
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// <i> 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
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// <i> 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
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// <o0.1> DBG_STOP
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// <i> Debug Stop Mode
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// <i> 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
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// <i> 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
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// <o0.2> DBG_STANDBY
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// <i> Debug Standby Mode
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// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
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// <i> 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
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// <o0.8> DBG_IWDG_STOP
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// <i> Debug independent watchdog stopped when core is halted
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// <i> 0: The watchdog counter clock continues even if the core is halted
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// <i> 1: The watchdog counter clock is stopped when the core is halted
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// <o0.9> DBG_WWDG_STOP
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// <i> Debug window watchdog stopped when core is halted
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// <i> 0: The window watchdog counter clock continues even if the core is halted
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// <i> 1: The window watchdog counter clock is stopped when the core is halted
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// <o0.10> DBG_TIM1_STOP
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// <i> Timer 1 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.11> DBG_TIM2_STOP
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// <i> Timer 2 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.12> DBG_TIM3_STOP
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// <i> Timer 3 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.13> DBG_TIM4_STOP
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// <i> Timer 4 counter stopped when core is halted
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// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
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// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
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// <o0.14> DBG_CAN1_STOP
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// <i> Debug CAN1 stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: CAN1 receive registers are frozen
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// <o0.15> DBG_I2C1_SMBUS_TIMEOUT
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// <i> I2C1 SMBUS timeout mode stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: The SMBUS timeout is frozen
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// <o0.16> DBG_I2C2_SMBUS_TIMEOUT
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// <i> I2C2 SMBUS timeout mode stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: The SMBUS timeout is frozen
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// <o0.17> DBG_TIM8_STOP
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// <i> Timer 8 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.18> DBG_TIM5_STOP
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// <i> Timer 5 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.19> DBG_TIM6_STOP
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// <i> Timer 6 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.20> DBG_TIM7_STOP
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// <i> Timer 7 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.21> DBG_CAN2_STOP
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// <i> Debug CAN2 stopped when Core is halted
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// <i> 0: Same behavior as in normal mode
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// <i> 1: CAN2 receive registers are frozen
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// <o0.25> DBG_TIM12_STOP
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// <i> Timer 12 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.26> DBG_TIM13_STOP
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// <i> Timer 13 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.27> DBG_TIM14_STOP
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// <i> Timer 14 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.28> DBG_TIM9_STOP
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// <i> Timer 9 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.29> DBG_TIM10_STOP
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// <i> Timer 10 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// <o0.30> DBG_TIM11_STOP
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// <i> Timer 11 counter stopped when core is halted
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// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
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// </h>
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DbgMCU_CR = 0x00000007;
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// <<< end of configuration section >>>
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@ -0,0 +1,20 @@
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/*
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* Auto generated Run-Time-Environment Component Configuration File
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* *** Do not modify ! ***
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*
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* Project: 'epd-demo'
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* Target: 'EPD_2in7_V2_test'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "stm32f10x.h"
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#endif /* RTE_COMPONENTS_H */
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@ -3,92 +3,92 @@
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<pre>
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<h1>µVision Build Log</h1>
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<h2>Tool Versions:</h2>
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IDE-Version: ¦ÌVision V5.25.2.0
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IDE-Version: ¦ÌVision V5.26.2.0
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Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
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License Information: ass ass, ass, LIC=JL2UH-W872P-CJR6Z-JYZTW-ESB48-R6YF4
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License Information: , , LIC=RC93N-YLJYL-JJH6S-LI3Z1-D1AV2-99PL8
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Tool Versions:
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Toolchain: MDK-ARM Plus Version: 5.25.2.0
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Toolchain Path: D:\Program Files\keil5\ARM\ARMCC\Bin
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Toolchain: MDK-ARM Plus Version: 5.26.2.0
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Toolchain Path: D:\KEIL\azwz\ARM\ARMCC\Bin
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C Compiler: Armcc.exe V5.06 update 6 (build 750)
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Assembler: Armasm.exe V5.06 update 6 (build 750)
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Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
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Library Manager: ArmAr.exe V5.06 update 6 (build 750)
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Hex Converter: FromElf.exe V5.06 update 6 (build 750)
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CPU DLL: SARMCM3.DLL V5.25.2.0
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Dialog DLL: DCM.DLL V1.17.1.0
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Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.1.0
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Dialog DLL: TCM.DLL V1.35.1.0
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CPU DLL: SARMCM3.DLL V5.26.2.0
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Dialog DLL: DCM.DLL V1.17.2.0
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Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
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Dialog DLL: TCM.DLL V1.36.1.0
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<h2>Project:</h2>
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E:\github\E-Paper_code\STM32\STM32-F103ZET6\MDK-ARM\epd-demo.uvprojx
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Project File Date: 10/20/2022
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E:\ÏîÄ¿\e-Paper\Code\E-Paper_code\STM32\STM32-F103ZET6\MDK-ARM\epd-demo.uvprojx
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Project File Date: 10/27/2022
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<h2>Output:</h2>
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*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'D:\Program Files\keil5\ARM\ARMCC\Bin'
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Build target 'epd-demo'
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*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'D:\KEIL\azwz\ARM\ARMCC\Bin'
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Build target 'EPD_2in7_V2_test'
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assembling startup_stm32f103xe.s...
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compiling spi.c...
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compiling usart.c...
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compiling gpio.c...
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compiling stm32f1xx_hal_msp.c...
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compiling DEV_Config.c...
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compiling usart.c...
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compiling stm32f1xx_it.c...
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compiling main.c...
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compiling spi.c...
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compiling ImageData.c...
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compiling DEV_Config.c...
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compiling stm32f1xx_hal_msp.c...
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compiling font8.c...
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compiling EPD_2in7_V2.c...
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compiling font12.c...
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compiling EPD_2in7_V2_test.c...
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compiling font12CN.c...
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compiling font16.c...
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compiling font24CN.c...
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compiling font20.c...
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compiling GUI_Paint.c...
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compiling font24.c...
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compiling system_stm32f1xx.c...
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compiling stm32f1xx_hal_gpio.c...
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compiling font24CN.c...
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compiling GUI_Paint.c...
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compiling stm32f1xx_hal_gpio_ex.c...
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compiling stm32f1xx_hal.c...
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compiling system_stm32f1xx.c...
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compiling stm32f1xx_hal_spi.c...
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compiling stm32f1xx_hal_rcc_ex.c...
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compiling stm32f1xx_hal_dma.c...
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compiling stm32f1xx_hal.c...
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compiling stm32f1xx_hal_rcc.c...
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compiling stm32f1xx_hal_flash.c...
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compiling stm32f1xx_hal_tim.c...
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compiling stm32f1xx_hal_exti.c...
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compiling stm32f1xx_hal_tim_ex.c...
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compiling stm32f1xx_hal_pwr.c...
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compiling stm32f1xx_hal_cortex.c...
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compiling stm32f1xx_hal_rcc_ex.c...
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compiling stm32f1xx_hal_dma.c...
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compiling stm32f1xx_hal_gpio.c...
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compiling stm32f1xx_hal_tim.c...
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compiling stm32f1xx_hal_tim_ex.c...
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compiling stm32f1xx_hal_exti.c...
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compiling stm32f1xx_hal_flash_ex.c...
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compiling stm32f1xx_hal_flash.c...
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compiling stm32f1xx_hal_uart.c...
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linking...
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epd-demo\epd-demo.axf: Error: L6218E: Undefined symbol EPD_test (referred from main.o).
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Not enough information to list image symbols.
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Not enough information to list load addresses in the image map.
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Finished: 2 information, 0 warning and 1 error messages.
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"epd-demo\epd-demo.axf" - 1 Error(s), 0 Warning(s).
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Program Size: Code=27652 RO-data=31976 RW-data=236 ZI-data=53428
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FromELF: creating hex file...
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"epd-demo\epd-demo.axf" - 0 Error(s), 0 Warning(s).
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<h2>Software Packages used:</h2>
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Package Vendor: ARM
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http://www.keil.com/pack/ARM.CMSIS.5.7.0.pack
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ARM.CMSIS.5.7.0
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CMSIS (Cortex Microcontroller Software Interface Standard)
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* Component: CORE Version: 5.4.0
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http://www.keil.com/pack/ARM.CMSIS.5.9.0.pack
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ARM.CMSIS.5.9.0
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CMSIS (Common Microcontroller Software Interface Standard)
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* Component: CORE Version: 5.6.0
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Package Vendor: Keil
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http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.3.0.pack
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Keil.STM32F1xx_DFP.2.3.0
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http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack
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Keil.STM32F1xx_DFP.2.1.0
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STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
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<h2>Collection of Component include folders:</h2>
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.\RTE\_epd-demo
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D:\Program Files\keil5\ARM\PACK\ARM\CMSIS\5.7.0\CMSIS\Core\Include
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D:\Program Files\keil5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Include
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.\RTE\_EPD_2in7_V2_test
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D:\KEIL\azwz\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include
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D:\KEIL\azwz\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include
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<h2>Collection of Component Files used:</h2>
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* Component: ARM::CMSIS:CORE:5.4.0
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Target not created.
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Build Time Elapsed: 00:00:15
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* Component: ARM::CMSIS:CORE:5.6.0
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Build Time Elapsed: 00:00:13
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</pre>
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</body>
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</html>
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@ -580,17 +580,17 @@ ARM Macro Assembler Page 9
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00000000
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Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
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ork --depend=epd-demo\startup_stm32f103xe.d -oepd-demo\startup_stm32f103xe.o -I
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.\RTE\_epd-demo -I"D:\Program Files\keil5\ARM\PACK\ARM\CMSIS\5.7.0\CMSIS\Core\I
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nclude" -I"D:\Program Files\keil5\ARM\PACK\Keil\STM32F1xx_DFP\2.3.0\Device\Incl
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ude" --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 525" -
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.\RTE\_EPD_2in7_V2_test -ID:\KEIL\azwz\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Incl
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ude -ID:\KEIL\azwz\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include --predefine
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="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 526" --predefine="_RTE
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ARM Macro Assembler Page 10
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-predefine="_RTE_ SETA 1" --predefine="STM32F10X_HD SETA 1" --list=startup_stm3
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2f103xe.lst startup_stm32f103xe.s
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_ SETA 1" --predefine="STM32F10X_HD SETA 1" --list=startup_stm32f103xe.lst star
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tup_stm32f103xe.s
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