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The new version of the driver board (Rev 2.3) adds an additional PWR control power supply and updates the Rpi and STM32 programs.

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This commit is contained in:
SSYYL 2023-04-21 11:44:58 +08:00
commit 6ec0aacc43
24 changed files with 44193 additions and 86923 deletions
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36
STM32/STM32-F103ZET6/MDK-ARM/DebugConfig/EPD_2in7_V2_test_STM32F103ZE_1.0.0.dbgconf Normal file
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// File: STM32F101_102_103_105_107.dbgconf
// Version: 1.0.0
// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008)
// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <i> Reserved bits must be kept at reset value
// <o.30> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.29> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.28> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.27> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.26> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.25> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.21> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
// <o.20> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.19> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.18> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.17> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.16> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.15> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.14> DBG_CAN1_STOP <i> Debug CAN1 stopped when Core is halted
// <o.13> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.12> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.11> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// <o.10> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// <o.9> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.8> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// <o.0> DBG_SLEEP <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000007;
// <<< end of configuration section >>>

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STM32/STM32-F103ZET6/MDK-ARM/epd-demo.uvguix.qiumingsong
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STM32/STM32-F103ZET6/MDK-ARM/epd-demo.uvoptx
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<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>72000000</CLKADS>
<CLKADS>8000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
@ -201,7 +201,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -422,7 +421,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -643,7 +641,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -864,7 +861,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -1085,7 +1081,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -1306,7 +1301,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -1527,7 +1521,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -1748,7 +1741,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -1969,7 +1961,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
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<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -2157,7 +2148,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
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<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -2378,7 +2368,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
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<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -2599,7 +2588,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
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<DbgClock>10000000</DbgClock>
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<pMultCmdsp></pMultCmdsp>
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<DbgClock>10000000</DbgClock>
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<pMultCmdsp></pMultCmdsp>
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<DbgClock>10000000</DbgClock>
@ -3262,7 +3248,6 @@
<pMultCmdsp></pMultCmdsp>
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<DbgClock>10000000</DbgClock>
@ -3483,7 +3468,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
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<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
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<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
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<DbgClock>10000000</DbgClock>
@ -3925,7 +3908,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
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<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
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<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -4367,7 +4348,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -4588,7 +4568,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -4809,7 +4788,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -5030,7 +5008,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -5251,7 +5228,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -5472,7 +5448,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -5693,7 +5668,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -5914,7 +5888,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -6135,7 +6108,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -6356,7 +6328,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -6577,7 +6548,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -6798,7 +6768,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -7019,7 +6988,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -7240,7 +7208,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -7461,7 +7428,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -7682,7 +7648,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -7903,7 +7868,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -8124,7 +8088,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -8345,7 +8308,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -8566,7 +8528,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -8787,7 +8748,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -8975,7 +8935,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
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<pMultCmdsp></pMultCmdsp>
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<Enable>1</Enable>
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<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
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<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
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<DbgClock>10000000</DbgClock>
@ -9638,7 +9595,6 @@
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<DebugDescription>
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<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -9859,7 +9815,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -10080,7 +10035,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -10301,7 +10255,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -10522,7 +10475,6 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -10552,7 +10504,7 @@
<Group>
<GroupName>Application/User</GroupName>
<tvExp>0</tvExp>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
@ -10632,7 +10584,7 @@
<Group>
<GroupName>Examples</GroupName>
<tvExp>0</tvExp>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
@ -11800,7 +11752,7 @@
<Group>
<GroupName>Config</GroupName>
<tvExp>0</tvExp>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>

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STM32/STM32-F103ZET6/MDK-ARM/epd-demo.uvprojx
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<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: , , LIC=RC93N-YLJYL-JJH6S-LI3Z1-D1AV2-99PL8
Tool Versions:
Toolchain: MDK-ARM Plus Version: 5.26.2.0
Toolchain Path: D:\KEIL\azwz\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
E:\ÏîÄ¿\e-Paper\Code\E-Paper_code\STM32\STM32-F103ZET6\MDK-ARM\epd-demo.uvprojx
Project File Date: 10/27/2022
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'D:\KEIL\azwz\ARM\ARMCC\Bin'
Build target 'EPD_2in7_V2_test'
assembling startup_stm32f103xe.s...
compiling gpio.c...
compiling usart.c...
compiling stm32f1xx_it.c...
compiling main.c...
compiling spi.c...
compiling ImageData.c...
compiling DEV_Config.c...
compiling stm32f1xx_hal_msp.c...
compiling font8.c...
compiling EPD_2in7_V2.c...
compiling font12.c...
compiling EPD_2in7_V2_test.c...
compiling font12CN.c...
compiling font16.c...
compiling font20.c...
compiling font24.c...
compiling font24CN.c...
compiling GUI_Paint.c...
compiling stm32f1xx_hal_gpio_ex.c...
compiling system_stm32f1xx.c...
compiling stm32f1xx_hal_spi.c...
compiling stm32f1xx_hal.c...
compiling stm32f1xx_hal_rcc.c...
compiling stm32f1xx_hal_pwr.c...
compiling stm32f1xx_hal_cortex.c...
compiling stm32f1xx_hal_rcc_ex.c...
compiling stm32f1xx_hal_dma.c...
compiling stm32f1xx_hal_gpio.c...
compiling stm32f1xx_hal_tim.c...
compiling stm32f1xx_hal_tim_ex.c...
compiling stm32f1xx_hal_exti.c...
compiling stm32f1xx_hal_flash_ex.c...
compiling stm32f1xx_hal_flash.c...
compiling stm32f1xx_hal_uart.c...
linking...
Program Size: Code=27652 RO-data=31976 RW-data=236 ZI-data=53428
FromELF: creating hex file...
"epd-demo\epd-demo.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.9.0.pack
ARM.CMSIS.5.9.0
CMSIS (Common Microcontroller Software Interface Standard)
* Component: CORE Version: 5.6.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.1.0.pack
Keil.STM32F1xx_DFP.2.1.0
STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_EPD_2in7_V2_test
D:\KEIL\azwz\ARM\PACK\ARM\CMSIS\5.9.0\CMSIS\Core\Include
D:\KEIL\azwz\ARM\PACK\Keil\STM32F1xx_DFP\2.1.0\Device\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.6.0
Build Time Elapsed: 00:00:13
</pre>
</body>
</html>

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